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HioSys PlugIn

The I/O-Based Approach - Step by Step

• Step 1: Component-Wise Plant Modeling
• Step 2: Component-Wise Specification and Controller Design
• Step 3: Abstraction
• Step 4: Subsystem Composition
• Step 5: Environment Modeling
• Step 6: Superposed Specification and Controller Design

Step 3: Abstraction

For the next hierarchical level, the original I/O plant components (uncontrolled plants or closed loops) can replaced by an abstraction that captures only the behaviour that is relevant for superposed control action. Aside from matching alphabets, the only formal design rule for an abstraction S'_PE of an I/O plant S_PE is the following language inclusion:

L_PE ⊆ L'_PE

By Theorem IV.8 in [H1], any controller that is designed for the plant abstraction and the original constraints S_P and S_E is guaranteed to also solve the original control problem. However, as a well-known downside of abstraction-based control, there is no guarantee that there exists a non-trivial controller for the plant abstraction even if there does exist one for the original plant. Hence the question, how to obtain a "good" abstraction, i.e. an abstraction that can be realized on a state space that is small in comparison to the original plant while still allowing for successful controller synthesis. For controlled components, we propose the safety specification of the preceding design step (Step 2 or 5) as a plant abstraction of the external closed-loop behaviour S_CE, as, by being enforced on the plant, it meets the above abstraction condition and represents those aspects of the preceding design step that are relevant for subsequent controller design. Consequently, we expect to obtain a non-trivial solution based on that abstraction. Moreover, the closed loops of controlled plant components never need to be computed, as instead the specifications are used for superposed controller design.

Transport Unit.(C++   lua) For the next hierarchical level, the closed loops of all locally controlled TU's are replaced by the local specifications designed in Step 2. Although the external closed loops are identical with the specification (i.e. the abstraction is trivial), we achieve a state space reduction from 11 states (full closed loop) to 6 states, which results from the introduction of abstract operator commands by the specification and the information hiding caused by the only external view on the alphabet Sigma_CE rather than Sigma_CPE.

libFAUDES 2.32b --- 2024.03.08 --- with "synthesis-observer-diagnosis-iosystem-hiosys-multitasking-coordinationcontrol-timed-iodevice-simulator-luabindings"