// dot output generated by libFAUDES vGenerator
digraph "NormalCompleteSynthNB(IO shuffle AB||Environment AB||Gene...et,NameSet,NameSet,NameSet,NameSet),actualspec) [minstate]" {
  rankdir=LR
  node [shape=circle];

  // initial states
  dot_dummyinit_1 [shape=none, label="", width="0.0", height="0.0" ];
  dot_dummyinit_1 -> "1";

  // mstates
  "3" [shape=doublecircle];
  "7" [shape=doublecircle];
  "11" [shape=doublecircle];
  "18" [shape=doublecircle];
  "19" [shape=doublecircle];
  "21" [shape=doublecircle];
  "22" [shape=doublecircle];
  "25" [shape=doublecircle];
  "1" [shape=doublecircle];
  "27" [shape=doublecircle];
  "29" [shape=doublecircle];
  "30" [shape=doublecircle];
  "31" [shape=doublecircle];
  "32" [shape=doublecircle];
  "33" [shape=doublecircle];
  "36" [shape=doublecircle];
  "37" [shape=doublecircle];
  "38" [shape=doublecircle];
  "40" [shape=doublecircle];
  "41" [shape=doublecircle];
  "42" [shape=doublecircle];
  "43" [shape=doublecircle];
  "44" [shape=doublecircle];
  "45" [shape=doublecircle];
  "46" [shape=doublecircle];
  "47" [shape=doublecircle];
  "49" [shape=doublecircle];
  "50" [shape=doublecircle];
  "51" [shape=doublecircle];
  "52" [shape=doublecircle];
  "53" [shape=doublecircle];
  "54" [shape=doublecircle];

  // rest of stateset
  "2";
  "4";
  "5";
  "6";
  "8";
  "9";
  "10";
  "12";
  "13";
  "14";
  "15";
  "16";
  "17";
  "20";
  "23";
  "24";
  "26";
  "28";
  "34";
  "35";
  "39";
  "48";

  // transition relation
  "2" -> "5" [label="pack_A"];
  "3" -> "9" [label="idle_A"];
  "3" -> "40" [label="idle_B"];
  "4" -> "13" [label="req_fl_A"];
  "5" -> "20" [label="req_tr_A"];
  "6" -> "8" [label="idle_A"];
  "6" -> "33" [label="idle_B"];
  "7" -> "18" [label="idle_A"];
  "7" -> "12" [label="idle_B"];
  "8" -> "4" [label="l2r_A"];
  "8" -> "6" [label="stby_A"];
  "9" -> "23" [label="stby_A"];
  "9" -> "15" [label="idle_AB"];
  "10" -> "18" [label="idle_A"];
  "10" -> "12" [label="idle_B"];
  "11" -> "25" [label="pack_A"];
  "12" -> "10" [label="stby_B"];
  "12" -> "24" [label="idle_AB"];
  "13" -> "14" [label="req_fl_AB"];
  "14" -> "2" [label="pack_AB"];
  "15" -> "8" [label="l2r_AB"];
  "15" -> "39" [label="stby_AB"];
  "16" -> "26" [label="stby_A"];
  "17" -> "10" [label="stby_B"];
  "18" -> "46" [label="stby_A"];
  "18" -> "31" [label="idle_AB"];
  "19" -> "7" [label="stby_B"];
  "20" -> "26" [label="pack_A"];
  "21" -> "7" [label="pack_B"];
  "22" -> "11" [label="req_tr_A"];
  "23" -> "9" [label="idle_A"];
  "23" -> "40" [label="idle_B"];
  "24" -> "35" [label="l2r_AB"];
  "24" -> "17" [label="stby_AB"];
  "25" -> "16" [label="idle_A"];
  "25" -> "54" [label="idle_B"];
  "26" -> "16" [label="idle_A"];
  "26" -> "54" [label="idle_B"];
  "1" -> "15" [label="idle_AB"];
  "1" -> "24" [label="idle_AB"];
  "1" -> "31" [label="idle_AB"];
  "1" -> "32" [label="idle_AB"];
  "27" -> "53" [label="idle_A"];
  "27" -> "35" [label="idle_B"];
  "28" -> "53" [label="idle_A"];
  "28" -> "35" [label="idle_B"];
  "29" -> "34" [label="idle_B"];
  "29" -> "31" [label="idle_AB"];
  "30" -> "34" [label="idle_B"];
  "30" -> "31" [label="idle_AB"];
  "31" -> "53" [label="l2r_AB"];
  "31" -> "41" [label="stby_AB"];
  "32" -> "33" [label="l2r_AB"];
  "32" -> "19" [label="stby_AB"];
  "33" -> "27" [label="stby_B"];
  "34" -> "30" [label="stby_B"];
  "34" -> "24" [label="idle_AB"];
  "35" -> "28" [label="stby_B"];
  "36" -> "21" [label="pack_AB"];
  "37" -> "22" [label="pack_A"];
  "38" -> "31" [label="idle_AB"];
  "39" -> "23" [label="stby_A"];
  "40" -> "29" [label="stby_B"];
  "40" -> "32" [label="idle_AB"];
  "41" -> "3" [label="stby_A"];
  "42" -> "32" [label="idle_AB"];
  "43" -> "36" [label="req_tr_AB"];
  "44" -> "37" [label="pack_AB"];
  "45" -> "43" [label="req_tr_B"];
  "46" -> "48" [label="idle_A"];
  "46" -> "32" [label="idle_AB"];
  "47" -> "48" [label="idle_A"];
  "47" -> "32" [label="idle_AB"];
  "48" -> "47" [label="stby_A"];
  "48" -> "15" [label="idle_AB"];
  "49" -> "44" [label="req_fl_AB"];
  "50" -> "45" [label="pack_B"];
  "51" -> "49" [label="req_fl_A"];
  "52" -> "50" [label="req_fl_B"];
  "53" -> "51" [label="l2r_A"];
  "54" -> "52" [label="l2r_B"];
};
